Timeline •  Term 1, Week 1  -  Start •  Term 1, Week 4  -  working USB kernel •  Term 1, Week 6  -  Defined interface                between core and application •  Term 1, Week 10  -  Working core code •  Term 2, Week 3  -  bus-topology display •  Term 2, Week 6  -  full monitoring •  Term 2, Week 9  -  active device           interrogation •  Term 3, Week 2  -  Begin final write up